Data compression based on Discrete Cosine Transform for implantable neural recording microsystems

This paper reports on the application of Discrete Cosine Transform (DCT) for data compression in implantable neural recording microsystems. Using the proposed data compression technique, the amount of the neural data transmitted off the implant is compressed by a factor of at least 67 at the expense of as low as 5.7% RMS of error. Based on the proposed idea, a 32-channel DCT processor was designed in a 0.18-μm CMOS process with 0.6mm² silicon area. The circuit consumes 23.7μW (0.74μW per channel) from a 1.8-V power supply. A prototype of the proposed processor was tested using pre-recorded neural signals and experimental results confirmed its successful operation.