DocumentCode
291089
Title
A large scale packet switch interconnection architecture using overflow switches
Author
Wong, P.C. ; Tung, Erik H.
Author_Institution
Dept. of Inf. Eng., Chinese Univ. of Hong Kong, Shatin, Hong Kong
Volume
2
fYear
1993
fDate
23-26 May 1993
Firstpage
708
Abstract
Several large-scale switch interconnection architectures are reviewed and compared. A three-stage interconnection architecture is proposed in which the second- and the third-stage switches are grouped into partitions. Overflow switches are used in each partition to route the otherwise lost traffic. The cell loss probability can be greatly reduced. It is shown that for the same cell loss performance, the authors´ design requires a lower input-expansion ratio at the first stage, resulting in a significant reduction of the overall complexity and the amount of interconnection lines
Keywords
delays; large-scale systems; losses; multistage interconnection networks; packet switching; probability; queueing theory; cell loss probability; complexity; design; interconnection lines; large-scale switch interconnection architectures; overflow switches; packet switch interconnection architecture; partitions; three-stage interconnection architecture; Broadband communication; Central office; Communication switching; Fabrics; Laboratories; Large-scale systems; Packet switching; Prototypes; Switches; Throughput;
fLanguage
English
Publisher
ieee
Conference_Titel
Communications, 1993. ICC '93 Geneva. Technical Program, Conference Record, IEEE International Conference on
Conference_Location
Geneva
Print_ISBN
0-7803-0950-2
Type
conf
DOI
10.1109/ICC.1993.397366
Filename
397366
Link To Document