DocumentCode
2910989
Title
Overlap reduction in symbolic system traversal
Author
Peranandam, Prakash M. ; Nalla, Pradeep K. ; Weiss, Roland J. ; Ruf, Jürgen ; Kropf, Thomas ; Rosenstiel, Wolfgang
Author_Institution
Dept. of Comput. Eng., Tubingen Univ., Germany
fYear
2005
fDate
30 Nov.-2 Dec. 2005
Firstpage
145
Lastpage
152
Abstract
A divide-and-conquer approach in BDD-based verification to handle larger designs is to partition BDDs exceeding a threshold size and to deal with the partitions separately. Crossover transitions to the same state cause the main problem of this methodology, because they result in overlap of the partitions and thus introduce redundant computations when dealing with the partitions. In this paper we describe an algorithm for splitting Boolean functions representing state sets of synchronous systems such that in subsequent symbolic traversal of the resulting subsets the state set overlap is reduced. We demonstrate the effectiveness of our splitting algorithm by applying it in sequential and distributed versions of a bounded property checking algorithm. Also, a dynamic extension to static overlap reduction is sketched.
Keywords
Boolean functions; binary decision diagrams; divide and conquer methods; logic partitioning; state-space methods; symbol manipulation; Boolean functions; bounded property checking algorithm; crossover transitions; divide-and-conquer approach; partition BDD; partitions overlap; redundant computations; splitting algorithm; state set overlap; static overlap reduction; symbolic system traversal; synchronous systems; Automata; Boolean functions; Cost function; Data structures; Design engineering; Explosions; Face detection; Partitioning algorithms; Proposals; State-space methods;
fLanguage
English
Publisher
ieee
Conference_Titel
High-Level Design Validation and Test Workshop, 2005. Tenth IEEE International
ISSN
1552-6674
Print_ISBN
0-7803-9571-9
Type
conf
DOI
10.1109/HLDVT.2005.1568829
Filename
1568829
Link To Document