DocumentCode :
2911609
Title :
Dual-state systolic architecture for recursive least-squares updating and downdating
Author :
Yang, T.C. ; Yao, K.
Author_Institution :
Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA
fYear :
1994
fDate :
1994
Firstpage :
316
Lastpage :
325
Abstract :
Orthogonal updating/hyperbolic downdating has been used for sliding window RLS estimation. While orthogonal updating is numerically stable, hyperbolic downdating can be unstable under certain ill-conditioned cases. We propose a new downdating scheme based on the reversed operations of the updating method utilizing orthogonal transformations. An example modeling some highly non-stationary data illustrates the advantage of the proposed scheme. This proposed downdating scheme can still be implemented on a previously known efficient dual-state systolic architecture for performing sliding window RLS estimation
Keywords :
systolic arrays; dual-state systolic architecture; hyperbolic downdating; orthogonal transformations; orthogonal updating; recursive least-squares updating; reversed operations; sliding window RLS estimation; Adaptive signal processing; Arithmetic; Performance evaluation; Recursive estimation; Resonance light scattering; Signal processing algorithms; State estimation; Systolic arrays;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Signal Processing, VII, 1994., [Workshop on]
Conference_Location :
La Jolla, CA
Print_ISBN :
0-7803-2123-5
Type :
conf
DOI :
10.1109/VLSISP.1994.574756
Filename :
574756
Link To Document :
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