DocumentCode :
2911862
Title :
An Efficient Method for Computation of Signatures
Author :
See, Chin-Foo ; Saluja, Kewal K.
Author_Institution :
Asia Peripheral Division, Hewlett Packard Singapore (Pte) Ltd.
fYear :
1992
fDate :
4-7 Jan 1992
Firstpage :
245
Lastpage :
250
Keywords :
Asia; Circuit faults; Circuit simulation; Circuit testing; Compaction; Computer errors; Cyclic redundancy check; Digital circuits; Linear feedback shift registers; Polynomials;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, 1992. Proceedings., The Fifth International Conference on
ISSN :
1063-9667
Print_ISBN :
0-8186-2465-5
Type :
conf
DOI :
10.1109/ICVD.1992.658055
Filename :
658055
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=2911862
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