• DocumentCode
    2911945
  • Title

    A new postprocessing architecture for soft output Viterbi decoding

  • Author

    Joeressen, Olaf J. ; Meyr, Heinrich

  • Author_Institution
    Integrated Syst. for Signal Process., Aachen Univ. of Technol., Germany
  • fYear
    1994
  • fDate
    1994
  • Firstpage
    336
  • Lastpage
    345
  • Abstract
    Soft output Viterbi decoding has evolved as a key technology for advanced decoding systems during the recent years. The article presents a modification of the soft output Viterbi algorithm and the resulting hardware architecture. The new approach leads to storage savings while maintaining the low computational complexity of former approaches and is thus advantageous for hardware as well as for software implementations. The complexity of soft output Viterbi decoding with the new approach is clearly less than twice that of hard decision Viterbi decoding
  • Keywords
    Viterbi decoding; computational complexity; hardware architecture; postprocessing architecture; soft output Viterbi decoding; Application specific integrated circuits; Batteries; Computational complexity; Computer architecture; Decoding; Hardware; Signal processing algorithms; Software maintenance; Very large scale integration; Viterbi algorithm;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Signal Processing, VII, 1994., [Workshop on]
  • Conference_Location
    La Jolla, CA
  • Print_ISBN
    0-7803-2123-5
  • Type

    conf

  • DOI
    10.1109/VLSISP.1994.574758
  • Filename
    574758