Title :
N2S: An Automatic Netlist to Schematic generator
Author :
Naveen, B. ; Savargaonkar, A. ; Raghunathan, K.S.
Author_Institution :
CAD - VLSI Group, I. T. I. ltd. Bangalore
Keywords :
Boolean functions; Circuit synthesis; Circuit testing; Complexity theory; Data structures; Documentation; Productivity; Routing; Silicon compiler; Very large scale integration;
Conference_Titel :
VLSI Design, 1992. Proceedings., The Fifth International Conference on
Print_ISBN :
0-8186-2465-5
DOI :
10.1109/ICVD.1992.658059