Title :
Evaluating underfill material for flip chip ball grid array package
Author :
Wang, Yu-Po ; Chai, Kevin ; Her, T.D. ; Lo, Randy
Author_Institution :
R&D Div. I, Siliconware Precision Ind. Co. Ltd., Taichung, Taiwan
Abstract :
Flip chip technology has appeared in a variety of package formats since it was introduced by IBM 30 years ago. The earlier FCBGA (flip chip ball grid array package) format often uses a classic C4 (controlled collapse chip connection) ceramic package. This type of package shows excellent electrical performance with shortest possible leads, lowest inductance, highest frequency, best noise control, highest density, greatest number of inputs/outputs (I/O), smallest device footprints, and lowest profile when compared with other popular interconnect methods. With substrate technology driving toward the cheaper but still reliable organic substrate, FCBGA is being increasingly used for a wide range of applications, such as implantable devices and automotive applications. This paper outlines the methodology used to screen for high reliability underfill in an evaluation study. The goal was to rank several commercially available underfill materials based on several processability and reliability criteria. The chosen material was used to manufacture samples of FCBGA devices for further testing. Finite element analysis was performed to determine the optimum fillet shape for the underfill. The stress distributions of chip and underfill were compared to obtain the optimization. Material properties effects of underfill were also studied. Underfill modulus and CTE (coefficient of thermal expansion) were parameters in this study. Experiments were carried out to verify the finite element results
Keywords :
ball grid arrays; ceramic packaging; circuit optimisation; elastic moduli; encapsulation; finite element analysis; flip-chip devices; integrated circuit interconnections; integrated circuit packaging; integrated circuit reliability; integrated circuit testing; internal stresses; thermal expansion; C4 ceramic package; FCBGA; FCBGA device testing; automotive applications; coefficient of thermal expansion; controlled collapse chip connection ceramic package; device footprint; electrical performance; finite element analysis; flip chip ball grid array package; flip chip ball grid array package format; flip chip technology; high reliability underfill; implantable devices; inductance; input/output count; interconnect methods; lead length; noise control; operating frequency; optimization; optimum fillet shape; package density; package formats; package profile; processability; reliability criteria; reliable organic substrate; stress distributions; substrate technology; underfill CTE; underfill material; underfill material properties effects; underfill materials; underfill modulus; Automotive applications; Ceramics; Electronics packaging; Finite element methods; Flip chip; Frequency; Inductance; Manufacturing; Materials reliability; Materials testing;
Conference_Titel :
Electronics Packaging Technology Conference, 2000. (EPTC 2000). Proceedings of 3rd
Print_ISBN :
0-7803-6644-1
DOI :
10.1109/EPTC.2000.906377