DocumentCode :
2913687
Title :
Modelling the reliability of high-density substrates and associated microelectronic components
Author :
Albrecht, H.J. ; Hyslop, D.C. ; Jendrny, J. ; Muller, W.H. ; Ng, K.M.W. ; Tan, K.H.
Author_Institution :
Siemens AG, Berlin, Germany
fYear :
2000
fDate :
2000
Firstpage :
412
Lastpage :
418
Abstract :
This paper presents lifetime predictions, based on finite element analysis (FEA), for the copper via connectors present in high density interconnectors (HDI) used for mounting of CSPs. The life-saving impact of various fillings of these connectors is investigated using different FE-sub-models for capture of the intricate HDI substructure. A ranking of the impact on lifetime of the various fillings is presented. Moreover, the structural integrity of the solder bumps of a flip chip structure with and without underfill is examined using FEA. It is demonstrated analytically that the underfill may lead to an improvement in lifetime of 300% or more
Keywords :
chip scale packaging; copper; encapsulation; finite element analysis; flip-chip devices; integrated circuit interconnections; integrated circuit modelling; integrated circuit reliability; soldering; CSP mounting; CSPs; Cu; FE-sub-models; FEA; HDI; HDI substructure; connector; copper via connectors; finite element analysis; flip chip structure; high density interconnectors; high-density substrates; lifetime prediction; microelectronic components; modelling; package lifetime; reliability; solder bumps; structural integrity; underfill; via filling; Chip scale packaging; Connectors; Copper; Costs; Filling; Finite element methods; Flip chip; Microelectronics; Thermal loading; Thermal stresses;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics Packaging Technology Conference, 2000. (EPTC 2000). Proceedings of 3rd
Print_ISBN :
0-7803-6644-1
Type :
conf
DOI :
10.1109/EPTC.2000.906409
Filename :
906409
Link To Document :
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