DocumentCode
2914631
Title
Simulation tool of network processor for learning activities
Author
De Freitas, Henrique Cota ; Martins, Carlos Augusto Paiva da Silva
Author_Institution
Pontifical Catholic Univ. of Minas Gerais, Brazil
Volume
3
fYear
2002
fDate
6-9 Nov. 2002
Abstract
We present a functional simulation tool of the network processor developed at the Pontifical Catholic University of Minas Gerais, Brazil. It started during an undergraduate research project. The instruction set and microarchitecture of this type of processor are specialized and dedicated to work in network layers. Our main goals are improving and optimizing the learning activities related to the network processor for engineering and computer science users.
Keywords
computer aided instruction; computer architecture; computer science education; digital simulation; instruction sets; Brazil; Pontifical Catholic University of Minas Gerais; computer science; engineering; network layers; network processor; processor instruction set; processor microarchitecture; simulation tool; undergraduate research project; Buffer storage; Computer aided instruction; Computer architecture; Computer networks; Logic; Microarchitecture; Read-write memory; Reduced instruction set computing; Registers; Switches;
fLanguage
English
Publisher
ieee
Conference_Titel
Frontiers in Education, 2002. FIE 2002. 32nd Annual
ISSN
0190-5848
Print_ISBN
0-7803-7444-4
Type
conf
DOI
10.1109/FIE.2002.1158665
Filename
1158665
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