A three-dimensional space vector modulation algorithm in a-b-c coordinate implemented by a FPGA

This paper introduces the principle of the SVM in a-b-c coordinates in detail. The traditional SVM require a bit of digital logic and computational power to determining the duty ratio of each switch. However, the algorithm for three-phase four-leg inverter in abc coordinates avoids the alphabetagamma transformation, which can make the selection of the switching vectors and calculation of the duty cycle much easier, and reduce the complexity of the modulation obviously. The implementation on a field programmable gate array (FPGA) of the SVM algorithm is also studied. The inverter implemented on FPGA has a fast response and high performances because FPGA can execute several processes synchronously in stead of executing instructions step by step. Simulation and experiment results convince the validity of the novel SVM algorithm and the feasibility to implementation on a FPGA based on the algorithm