Title :
EPLDs - a Milestone in the World of Logic Design
Author_Institution :
Sritech Information Technology (P) Ltd.
Keywords :
CMOS technology; EPROM; Industrial training; Logic arrays; Logic design; Logic devices; Macrocell networks; Programmable logic arrays; Semiconductor device reliability; Semiconductor devices;
Conference_Titel :
VLSI Design, 1992. Proceedings., The Fifth International Conference on
Print_ISBN :
0-8186-2465-5
DOI :
10.1109/ICVD.1992.658075
