Low complexity synchronizer architecture based on common autocorrelator for Digital Video Broadcasting system

This paper presents an efficient synchronizer architecture using a common autocorrelator for digital video broadcasting via satellite, second generation (DVB-S2). To achieve the required performance under the worst channel condition and to implement the efficient H/W resource utilization of functional synchronization blocks, we propose a new efficient common autocorrelator structure. The proposed architecture can decrease about 92% of multipliers and 81% of adders compared with the direct implementation. Moreover, the proposed architecture has been thoroughly verified in Xilinxtrade Virtex IV and R&Strade SFU (Signaling and Formatting Unit) broadcast test equipment.