An improved anisotropic wet etching process for the fabrication of silicon mems structures using a single etching mask

We have developed an improved anisotropic wet etching process for the fabrication of various silicon microstructures with rounded concave and sharp convex corners, grooves for chip isolation, meandering micro-fluidic channels, mesa structures with bent V-grooves, and 45deg mirrors with highly smooth surface finish by using a single etching mask on (100) wafers. In this work, we use a CMOS compatible anisotropic etchant containing tetramethyl ammonium hydroxide (TMAH) and a small amount (0.1% v/v) of a non-ionic surfactant (NC-200), containing 100% polyoxyethylene-alkyl- phenyl-ether. The process has been developed by analyzing the etching characteristics of (100) silicon wafers in pure and surfactant added TMAH.