DocumentCode
2919290
Title
Comparative analysis of resource requirements for monolithic and multi-stage Clos crosspoint switch implementations in VLSI
Author
Abdul Aziz, Amir Shah ; Muhamed, A.H. ; Rahman, Z. ; Ismail, M.N. ; Ismail, U.S. ; Haron, Nor Zaidi
Author_Institution
IP Core Network Technol., TM R&D, Cyberjaya, Malaysia
fYear
2010
fDate
11-14 April 2010
Firstpage
111
Lastpage
115
Abstract
This paper presents an in-depth analysis of resource requirements data related to the implementation of monolithic and multi-stage (Clos) crosspoint switches in CMOS VLSI technology. A crosspoint switch is composed of two parts: a switching matrix and a configuration mechanism. Previous papers comparing the pros and cons of monolithic and multi-stage implementations only consider the difference in switching matrix resource requirements, while neglecting to scrutinize their effects on the configuration mechanism. Our approach analyzes both aspects and presents the results in symbolical and numerical terms. The results re-affirm the superiority of multi-stage implementation for switches with high numbers of inputs and outputs, but also show that for realistically-sized switches, a monolithic implementation can be more resource-efficient.
Keywords
CMOS technology; Computer networks; Data engineering; Large-scale systems; Multiplexing; Paper technology; Resumes; Switches; Telecommunication switching; Very large scale integration; Clos; Crosspoint Switch; Monolithic; Resource Requirements; VLSI;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic Devices, Systems and Applications (ICEDSA), 2010 Intl Conf on
Conference_Location
Kuala Lumpur, Malaysia
Print_ISBN
978-1-4244-6629-0
Type
conf
DOI
10.1109/ICEDSA.2010.5503093
Filename
5503093
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