Title :
Efficient modeling and analysis of switch-induced error voltage in high resolution SAR ADCs
Author :
Mashhadi, Samaneh Babayan ; Pishbin, Seyyed Iman
Author_Institution :
Dept. of Electr., Imamreza Univ. of Mashhad, Mashhad, Iran
Abstract :
In this paper, switch-induced error voltage of a MOS switch in a deep submicron technology, is modeled and analyzed using a continuous and physical formulation based on the EKV model. In order to show the effectiveness of this error estimation model, it has been applied to correct the DAC switch-induced error voltages in a 12-bit 1Ms/s charge-redistribution Successive Approximation (SAR) ADC. SPICE simulations, based on the BSIM3v3.2 model, which ensures the charge conservation, have confirmed the validity of the model. Employing switch-induced error correction scheme, the SAR ADC achieves a resolution of 12 bit at 1Ms/s.
Keywords :
MIS devices; analogue-digital conversion; approximation theory; estimation theory; BSIM3v3.2 model; EKV model; MOS switch; SPICE simulation; charge conservation; charge-redistribution successive approximation; deep submicron technology; error estimation model; high resolution SAR ADC; switch-induced error correction scheme; switch-induced error voltage; word length 12 bit; Capacitance; Capacitors; Clocks; Logic gates; Mathematical model; Switches; Switching circuits;
Conference_Titel :
Electronics, Circuits and Systems (ICECS), 2011 18th IEEE International Conference on
Conference_Location :
Beirut
Print_ISBN :
978-1-4577-1845-8
Electronic_ISBN :
978-1-4577-1844-1
DOI :
10.1109/ICECS.2011.6122250
