• DocumentCode
    2920503
  • Title

    Large-signal settling optimization of SC circuits using two-stage amplifiers with current-buffer miller compensation

  • Author

    Amoroso, F.A. ; Pugliese, A. ; Cappuccino, G.

  • Author_Institution
    Dept. of Electron., Comput. Sci. & Syst., Univ. of Calabria, Rende, Italy
  • fYear
    2009
  • fDate
    12-17 July 2009
  • Firstpage
    328
  • Lastpage
    331
  • Abstract
    The large-signal performances of switched-capacitor (SC) circuits employing two-stage operational amplifiers (opamps) with current-buffer Miller compensation are analyzed. Well-defined rules to fix carefully the bias currents of the two op-amp stages are proposed in order to optimize the amplifier settling behavior. Simulation results related to op-amps designed in a commercial 0.35 ¿m CMOS technology show the usefulness of the proposed design guidelines.
  • Keywords
    CMOS analogue integrated circuits; circuit optimisation; compensation; operational amplifiers; switched capacitor networks; CMOS technology; current-buffer Miller compensation; large-signal settling optimization; op-amp; size 0.35 mum; switched-capacitor circuits; two-stage operational amplifiers; CMOS technology; Capacitance; Computer science; Design optimization; Frequency; MOSFETs; Operational amplifiers; Performance analysis; Switching circuits; Time factors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Research in Microelectronics and Electronics, 2009. PRIME 2009. Ph.D.
  • Conference_Location
    Cork
  • Print_ISBN
    978-1-4244-3733-7
  • Electronic_ISBN
    978-1-4244-3734-4
  • Type

    conf

  • DOI
    10.1109/RME.2009.5201292
  • Filename
    5201292