DocumentCode
2920677
Title
A random demodulator with a software-based integrator resetting scheme
Author
Singal, Vikas ; Massoud, Yehia
Author_Institution
Univ. of Alabama at Birmingham, Birmingham, AL, USA
fYear
2011
fDate
11-14 Dec. 2011
Firstpage
310
Lastpage
313
Abstract
The random demodulator architecture is a compressive sensing based receiver that allows the reconstruction of frequency-sparse signals from measurements acquired at a rate below the signal´s Nyquist rate. This in turn results in tremendous power savings in receivers because of the direct correlation between the power consumption of analog-to-digital converters (ADCs) in communication receivers and the sampling rate at which these ADCs operate. In this paper, we propose a random demodulator with a software-based integrator resetting scheme that does not use a switch to reset the integrator as in the conventional random demodulator system, but rather modifies the random signal so that the integrator is reset by zeroing the input. We show that the proposed system is equivalent to the conventional random demodulator, but is more practical to implement because of the many artifacts presented by switches.
Keywords
analogue-digital conversion; demodulators; radio receivers; signal reconstruction; ADC; analog-to-digital converter; communication receiver; compressive sensing based receiver; frequency-sparse signal reconstruction; power consumption; power savings; random demodulator architecture; sampling rate; signal Nyquist rate; software-based integrator resetting scheme; Analytical models; Clocks; Demodulation; Inductance; Noise; Switches; Analog Mixer; Analog to Digital Conversion; Compressive sensing;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics, Circuits and Systems (ICECS), 2011 18th IEEE International Conference on
Conference_Location
Beirut
Print_ISBN
978-1-4577-1845-8
Electronic_ISBN
978-1-4577-1844-1
Type
conf
DOI
10.1109/ICECS.2011.6122275
Filename
6122275
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