Title :
Design of floating point units for interval arithmetic
Author :
Amaricai, Alexandru ; Vladutiu, Mircea ; Boncalo, Oana
Author_Institution :
Univ. Politeh. of Timisoara, Timisoara, Romania
Abstract :
In this paper, hardware units for interval addition, multiplication and divide-add fused are presented. Regarding interval addition, a new architecture of double path adder, is presented. This architecture exploits the parallel structure of double path adder. Regarding multiplication, the proposed architecture is based on a dual result multiplier (floating point multiplication unit with two differently rounded results for the same pair of operands) and two floating point comparators. The goal of the divide-add fused unit is to increase the performance of the interval Newton´s method. Algorithm and architecture for this operation, inspired by the ones used for multiply-add fused, are proposed.
Keywords :
Newton method; adders; comparators (circuits); floating point arithmetic; double path adder; floating point comparators; floating point units; hardware units; interval Newton method; interval addition; interval arithmetic; parallel structure; Adders; Computer architecture; Costs; Delay; Floating-point arithmetic; H infinity control; Hardware; Newton method; Nonlinear equations; Standards development;
Conference_Titel :
Research in Microelectronics and Electronics, 2009. PRIME 2009. Ph.D.
Conference_Location :
Cork
Print_ISBN :
978-1-4244-3733-7
Electronic_ISBN :
978-1-4244-3734-4
DOI :
10.1109/RME.2009.5201307
