DocumentCode
2920927
Title
A greedy algorithm for wire length optimization
Author
Li, Yiming ; Yi Li ; Zhou, Mingtian
Author_Institution
Sch. of Comput. Sci. & Eng., Univ. of Electron. Sci. & Technol. of China, Chengdu, China
fYear
2011
fDate
11-14 Dec. 2011
Firstpage
366
Lastpage
369
Abstract
Given a LB-compact floorplan, it is obvious that we can get other floorplans with the same topology and area but different wire length by the white space distribution. In this paper, a greedy algorithm is proposed for wire length optimization. We derive significant conditions to identify the moving ranges of movable blocks. The moving cost tree is constructed. The maximum reduction on total half-perimeter wire length (HPWL) and offset for each block can be evaluated. Experimental results show that the greedy algorithm is effectively.
Keywords
greedy algorithms; integrated circuit layout; network topology; optimisation; wires (electric); LB-compact floorplan; cost tree construction; greedy algorithm; total HPWL; total half-perimeter wire length; white space distribution; wire length optimization; Complexity theory; Greedy algorithms; Nickel; Pins; Topology; White spaces; Wires;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics, Circuits and Systems (ICECS), 2011 18th IEEE International Conference on
Conference_Location
Beirut
Print_ISBN
978-1-4577-1845-8
Electronic_ISBN
978-1-4577-1844-1
Type
conf
DOI
10.1109/ICECS.2011.6122289
Filename
6122289
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