• DocumentCode
    2920984
  • Title

    CAD tool for parameterized FPGA based FFT architectures

  • Author

    Schmuland, Todd E. ; Jamali, Mohsin M. ; Longbrake, Matthew B. ; Buxa, Peter E.

  • Author_Institution
    Dept. of Electr. Eng. & Comput. Sci., Univ. of Toledo, Toledo, OH, USA
  • fYear
    2011
  • fDate
    11-14 Dec. 2011
  • Firstpage
    378
  • Lastpage
    381
  • Abstract
    This paper describes a software tool for simulating and generating fully parallel generic VHDL representations of Fast Fourier Transforms. A comparison between parallel-parallel and serial-parallel butterflies is performed with emphasis on maximizing speed and/or minimizing FPGA area. Comparisons of the software tool to other VHDL/Verilog generators, namely CoreGen and SPIRAL, are also explored.
  • Keywords
    CAD; fast Fourier transforms; field programmable gate arrays; hardware description languages; software tools; CAD tool; CoreGen; FFT architectures; SPIRAL; VHDL/Verilog generators; fast Fourier transforms; fully parallel generic VHDL representations; parameterized FPGA; software tool; Clocks; Field programmable gate arrays; Kernel; Shift registers; Software tools; Spirals; Timing; Fast fourier transforms; Field programmable gate arrays; Software tools;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronics, Circuits and Systems (ICECS), 2011 18th IEEE International Conference on
  • Conference_Location
    Beirut
  • Print_ISBN
    978-1-4577-1845-8
  • Electronic_ISBN
    978-1-4577-1844-1
  • Type

    conf

  • DOI
    10.1109/ICECS.2011.6122292
  • Filename
    6122292
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2920984