Title :
A low-voltage low-power successive approximation reconfigurable ADC based on SC techniques
Author :
Rodríguez-Pérez, Alberto ; Delgado-Restituto, Manuel ; Medeiro, Fernando
Author_Institution :
Inst. of Microelectron. of Seville (IMSE-CNM-CSIC), Univ. of Seville Edificio IMSE-CNM, Sevilla, Spain
Abstract :
This paper presents a 12-bit low-voltage low-power analog-to-digital converter (ADC). The design employs switched capacitor (SC) techniques and implements a successive approximation (SA) algorithm. The ADC is highly reconfigurable, with digitally selectable resolution and input signal amplitude, and achieves 11.4-bit of effective resolution at 500 kHz clock frequency, with a power consumption below 3 ¿W from a 1 V voltage supply.
Keywords :
analogue-digital conversion; approximation theory; low-power electronics; frequency 500 kHz; low-power analog-to-digital converter; low-voltage analog-to-digital converter; reconfigurable ADC; successive approximation; switched capacitor; voltage 1 V; word length 11.4 bit; word length 12 bit; Analog-digital conversion; Capacitors; Clocks; Energy consumption; Frequency; Parasitic capacitance; Reactive power; Reconfigurable logic; Signal resolution; Voltage;
Conference_Titel :
Research in Microelectronics and Electronics, 2009. PRIME 2009. Ph.D.
Conference_Location :
Cork
Print_ISBN :
978-1-4244-3733-7
Electronic_ISBN :
978-1-4244-3734-4
DOI :
10.1109/RME.2009.5201319
