A new digital background correction algorithm with non-precision calibration signals for pipelined ADCs

A new digital background calibration algorithm for pipelined analog-to-digital converters is proposed in this paper. It is based on error estimation with non-precision calibration signals for foreground correction and a modified split structure for converting the foreground structure to the background one. This architecture allows improving the calibration signals accuracy contrarily to linear gain error coefficient, while the modified split structure does not need matching between the two channels. The presented algorithm is investigated in system level in MATLAB for a 12-bit pipelined ADC. It achieves an improvement equal to 36.5 dB and 44.5 dB for SNDR and SFDR, respectively where the input signal frequency is 39 MHz with a 100 MHz sampling frequency.