Title :
A new digital background correction algorithm with non-precision calibration signals for pipelined ADCs
Author :
Zeinali, Behzad ; Yavari, Mohammad
Author_Institution :
Dept. of Electr. Eng., Amirkabir Univ. of Technol., Tehran, Iran
Abstract :
A new digital background calibration algorithm for pipelined analog-to-digital converters is proposed in this paper. It is based on error estimation with non-precision calibration signals for foreground correction and a modified split structure for converting the foreground structure to the background one. This architecture allows improving the calibration signals accuracy contrarily to linear gain error coefficient, while the modified split structure does not need matching between the two channels. The presented algorithm is investigated in system level in MATLAB for a 12-bit pipelined ADC. It achieves an improvement equal to 36.5 dB and 44.5 dB for SNDR and SFDR, respectively where the input signal frequency is 39 MHz with a 100 MHz sampling frequency.
Keywords :
analogue-digital conversion; mathematics computing; pipeline arithmetic; MATLAB; SFDR; SNDR; analog-to-digital converters; digital background correction algorithm; error estimation; frequency 100 MHz; frequency 39 MHz; linear gain error coefficient; non-precision calibration signals; pipelined ADC; word length 12 bit; Accuracy; Analog-digital conversion; CMOS integrated circuits; Calibration; Delay; Error analysis; Gain;
Conference_Titel :
Electronics, Circuits and Systems (ICECS), 2011 18th IEEE International Conference on
Conference_Location :
Beirut
Print_ISBN :
978-1-4577-1845-8
Electronic_ISBN :
978-1-4577-1844-1
DOI :
10.1109/ICECS.2011.6122302
