Title :
Design of new full adder cell using hybrid-CMOS logic style
Author :
Zavarei, Mohammad Javad ; Baghbanmanesh, Mohammad Reza ; Kargaran, Ehsan ; Nabovati, Hooman ; Golmakani, Abbas
Author_Institution :
Dept. of Electr. Eng., Sadjad Inst. for Higher Educ., Mashhad, Iran
Abstract :
In this paper, we propose a novel 1-bit full adder using hybrid-CMOS logic style. The new full adder is based on a novel XOR-XNOR circuit that generates XOR and XNOR full-swing outputs simultaneously and outperforms its best counterpart showing 28% improvement in power-delay product (PDP). Design of proposed full adder is based on improvement in the PDP and it provides full-swing output with good driving capability. Simulations demonstrate that full adder successfully operates in the PDP compared to similar circuits.
Keywords :
CMOS integrated circuits; adders; integrated circuit design; full adder cell; hybrid-CMOS logic style; power-delay product; Adders; CMOS integrated circuits; Delay; Integrated circuit modeling; Power dissipation; Simulation; Transistors;
Conference_Titel :
Electronics, Circuits and Systems (ICECS), 2011 18th IEEE International Conference on
Conference_Location :
Beirut
Print_ISBN :
978-1-4577-1845-8
Electronic_ISBN :
978-1-4577-1844-1
DOI :
10.1109/ICECS.2011.6122310
