A 5.2 GHz CMOS Low Noise Amplifier with High-Q Inductors Embedded in Wafer-Level Chip-Scale Package

Author

Fukuda, Satoshi ; Ito, Hiroyuki ; Itoi, Kazuhisa ; Sato, Masakazu ; Ito, Tatsuya ; Yamauchi, Ryozo ; Okada, Kenichi ; Masu, Kazuya

Author_Institution

Tokyo Inst. of Technol., Yokohama

fYear

2007

fDate

9-11 Dec. 2007

Firstpage

34

Lastpage

37

Abstract

This paper presents a low noise amplifier (LNA) with high-Q inductors in a wafer-level chip-scale package (WL-CSP) process. Q-factor of inductors has big impacts on characteristics of LNAs, thus we investigate availability of WL-CSP high-Q inductors. A common-source LNA with inductive degeneration is used for discussion. The 5.2 GHz LNA with WL-CSP inductors provides a noise figure of 1.7 dB which is 1.5 dB smaller than that with on-chip inductors.

Keywords

CMOS integrated circuits; MMIC amplifiers; Q-factor; inductors; integrated circuit packaging; low noise amplifiers; CMOS low noise amplifier; LNA; Q-factor; frequency 5.2 GHz; noise figure; noise figure 1.7 dB; on-chip inductors; wafer-level chip-scale package; CMOS technology; Chip scale packaging; Circuits; Dielectric substrates; Inductors; Low-noise amplifiers; Q factor; Radio frequency; Resins; Wafer scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Radio-Frequency Integration Technology, 2007. RFIT 007. IEEE International Workshop on

Conference_Location

Rasa Sentosa Resort

Print_ISBN

978-1-4244-1307-2

Electronic_ISBN

978-1-4244-1308-9

Type

conf

DOI

10.1109/RFIT.2007.4443913

Filename

4443913