DocumentCode :
2921717
Title :
Automatic generation of memory consistency tests for chip multiprocessing
Author :
Rambo, Eberle A. ; Henschel, Olav P. ; Santos, Luiz C V dos
Author_Institution :
Comput. Sci. Dept., Fed. Univ. of Santa Catarina, Florianopolis, Brazil
fYear :
2011
fDate :
11-14 Dec. 2011
Firstpage :
542
Lastpage :
545
Abstract :
Chip multiprocessing (CMP) changed the architectural landscape of PCs and servers and is now changing the way personal mobile devices are designed. CMP requires access to shared variables in private memories, leading to complex chains of interacting events that must offer a consistent view of shared memory. Checking if a memory system implements a specified memory consistency model (MCM) is a challenging verification problem. We propose a generator of multi-threading random-instruction sequences for MCM checking. It complies with an arbitrary MCM and can be used by most checkers. Its ability to provide full coverage was evaluated through 1200 test cases.
Keywords :
formal verification; instruction sets; memory architecture; microprocessor chips; mobile handsets; multi-threading; random sequences; shared memory systems; CMP; MCM checking; automatic generation; chip multiprocessing; computer architecture; memory consistency model; memory consistency tests; multi-threading; personal mobile devices; random instruction sequences; shared memory system; Coherence; Complexity theory; Generators; Instruction sets; Memory management;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics, Circuits and Systems (ICECS), 2011 18th IEEE International Conference on
Conference_Location :
Beirut
Print_ISBN :
978-1-4577-1845-8
Electronic_ISBN :
978-1-4577-1844-1
Type :
conf
DOI :
10.1109/ICECS.2011.6122332
Filename :
6122332
Link To Document :
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