DocumentCode
2921775
Title
A Switching Activity Analysis and visualisation tool for power optimisation of SoC buses
Author
English, Tom ; Man, Ka Lok ; Popovici, Emanuel
Author_Institution
Dept of Microelectron. Eng., Univ. Coll. Cork, Cork, Ireland
fYear
2009
fDate
12-17 July 2009
Firstpage
264
Lastpage
267
Abstract
As part of our ongoing research, we present BSAA - Bus Switching Activity Analyser - a CAD tool which reads switching activity from RTL simulation, extracting a list of the circuit´s buses and associated switching activity metrics. The list is filtered and sorted according to user-specified criteria, producing reports and a set of graphical switching activity profiles of the circuit´s most active buses. The tool identifies common profiles corresponding to typical address- and data bus traffic. As part of a CAD flow, BSAA enables rapid switching activity analysis and encoding design for switching minimisation on heavily-loaded cross-chip buses and IO pins.
Keywords
circuit CAD; data visualisation; electronic engineering computing; system-on-chip; RTL simulation; SoC buses; bus switching activity analyser; data bus traffic; graphical switching activity profile; power optimisation; switching activity analysis; visualisation tool; Analytical models; Capacitance; Encoding; Integrated circuit interconnections; Semiconductor device modeling; Switching circuits; Traffic control; Visualization; Voltage; Wire;
fLanguage
English
Publisher
ieee
Conference_Titel
Research in Microelectronics and Electronics, 2009. PRIME 2009. Ph.D.
Conference_Location
Cork
Print_ISBN
978-1-4244-3733-7
Electronic_ISBN
978-1-4244-3734-4
Type
conf
DOI
10.1109/RME.2009.5201355
Filename
5201355
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