An accurate model for PWM mode buck converter stability analysis comprising switch conduction loss

In the design process of integrated DC/DC converters it is desirable to assess as many critical design parameters and parasitic effects by simulation as possible as the control loop is hard to tune after fabrication. In this work, switch conduction loss of an integrated, synchronous buck converter is identified to have significant influence on control loop dynamics. Thus, an equivalent small-signal model for the open loop frequency response accounting for switch conduction loss is developed. Finally, the model is validated against the frequency response obtained by periodic stability analysis which can account for parasitic effects and loading. Very good agreement between the extended model and the results obtained from periodic stability analysis is obtained. The method and model presented in this work help to compensate DC/DC converters more effectively.