Abstract :
The following topics are dealt with: NBTI (negative bias temperature instability); back-end reliability; reliability of low-k dielectrics and interconnects; reliability of sensors/memories; high-k reliability; reliability of compound materials and devices such as MOSFETs and HBTs; fWLR reliability (fast wafer level reliability); ESD-CDM microelectronic testing; thermal fatigue life; reliability simulation; CMOS design.
Keywords :
CMOS integrated circuits; MOSFET; digital storage; electrostatic discharge; heterojunction bipolar transistors; high-k dielectric thin films; integrated circuit design; integrated circuit interconnections; integrated circuit modelling; integrated circuit reliability; integrated circuit testing; low-k dielectric thin films; semiconductor device reliability; sensors; thermal stress cracking; wafer level packaging; CMOS design; ESD-CDM microelectronic testing; HBT reliability; MOSFET reliability; NBTI; back-end reliability; compound materials; fWLR reliability; fast wafer level reliability; high-k reliability; integrated circuit reliability; low-k dielectrics; low-k interconnects; memory device reliability; negative bias temperature instability; reliability simulation; sensor reliability; thermal fatigue life;
Conference_Titel :
Integrated Reliability Workshop Final Report, 2008. IRW 2008. IEEE International
Conference_Location :
S. Lake Tahoe, CA
Print_ISBN :
978-1-4244-2194-7
DOI :
10.1109/IRWS.2008.4796061
