Continuous-Time Quadrature Bandpass Sigma-Delta Modulator for GPS/Galileo Low-If Receiver

Author

Kim, Song-Bok ; Joeres, Stefan ; Zimmermann, Niklas ; Robens, Markus ; Wunderlich, Ralf ; Heinen, Stefan

Author_Institution

RWTH Aachen Univ., Aachen

fYear

2007

fDate

9-11 Dec. 2007

Firstpage

127

Lastpage

130

Abstract

In this paper, starting from theoretical considerations on the chosen architecture, chip design and measurement results are presented for a continuous-time quadrature bandpass sigma-delta (SigmaDelta) modulator for a combined GPS and Galileo low-IF receiver. The modulator chip was designed in a standard 0.25 mum CMOS technology. The designed CT quadrature bandpass SigmaDelta modulator has a power consumption of 20.5 mW with 1.8-V supply voltage, a dynamic range of 57.5 dB and 50.2 dB and a peak SNDR of 52.9 dB and 48.4 dB for GPS/Galileo, respectively. The core area of the chip is 0.37 times 0.54 mm².

Keywords

CMOS integrated circuits; Global Positioning System; radio receivers; satellite navigation; sigma-delta modulation; CMOS technology; GPS low-IF receiver; Galileo; continuous-time quadrature bandpass sigma-delta modulator; power 20.5 mW; size 0.25 mum; voltage 1.8 V; Band pass filters; CMOS technology; Delta-sigma modulation; Energy consumption; Frequency; Global Positioning System; Output feedback; Sampling methods; Semiconductor device measurement; Topology;

fLanguage

English

Publisher

ieee

Conference_Titel

Radio-Frequency Integration Technology, 2007. RFIT 007. IEEE International Workshop on

Conference_Location

Rasa Sentosa Resort

Print_ISBN

978-1-4244-1307-2

Electronic_ISBN

978-1-4244-1308-9

Type

conf

DOI

10.1109/RFIT.2007.4443935

Filename

4443935