Title :
Implementation of a 64-point FFT on a Multi-Processor System-on-Chip
Author :
Airoldi, Roberto ; Garzia, Fabio ; Nurmi, Jari
Author_Institution :
Dept. of Comput. Syst., Tampere Univ. of Technol., Tampere, Finland
Abstract :
This paper describes the implementation of a 64-point FFT on a Multi-Processor System-on-Chip (MPSoC) composed of 9 homogeneous clusters. Each cluster is built around a RISC processor. The implementation technique adopted for the mapping of the FFT produces a speed-up of 6× which is close to the theoretical limit. This is due to a reduced overhead of intra-clusters communication.
Keywords :
fast Fourier transforms; multiprocessing systems; reduced instruction set computing; system-on-chip; 64-point FFT; RISC processor; intraclusters communication; multiprocessor system-on-chip; Communication switching; Computer architecture; Digital audio players; Embedded system; Network-on-a-chip; Power generation economics; Reduced instruction set computing; Signal processing algorithms; System-on-a-chip; Wireless communication;
Conference_Titel :
Research in Microelectronics and Electronics, 2009. PRIME 2009. Ph.D.
Conference_Location :
Cork
Print_ISBN :
978-1-4244-3733-7
Electronic_ISBN :
978-1-4244-3734-4
DOI :
10.1109/RME.2009.5201371
