Title :
Design requirement of on-chip DC-DC converter for block-level Dynamic Voltage Scaling
Author :
Ichihashi, Motoi
Author_Institution :
CEA-Leti, MINATEC, Grenoble, France
Abstract :
This paper discusses the design requirement of on-chip dc-dc converter for block-level Dynamic Voltage Scaling (DVS). The target application is low-power SoC where DVS can be applied to all the implemented logic blocks. The proposed converter occupies only five bonding pads and the simulation demonstrates that the leakage current is only 84 nA in the standby mode. As shown by a set of equations based on a first order model, the proposed converter does not need any pulse frequency modulator (PFM).
Keywords :
CMOS integrated circuits; DC-DC power convertors; system-on-chip; block-level dynamic voltage scaling; low power SoC; onchip DC-DC converter; Bonding; DC-DC power converters; Dynamic voltage scaling; Equations; Frequency conversion; Leakage current; Logic; Pulse modulation; Pulse width modulation converters; Voltage control; CMOS; DC-DC converter; DVS; SoC;
Conference_Titel :
Research in Microelectronics and Electronics, 2009. PRIME 2009. Ph.D.
Conference_Location :
Cork
Print_ISBN :
978-1-4244-3733-7
Electronic_ISBN :
978-1-4244-3734-4
DOI :
10.1109/RME.2009.5201374
