Effect of substrate hot carrier stress on high-k gate stack

Author

Park, Hokyung ; Bersuker, Gennadi ; Kang, Chang Yong ; Young, Chadwin ; Tseng, Hsing-Huang ; Jammy, Raj

Author_Institution

SEMATECH, Austin, TX

fYear

2008

fDate

12-16 Oct. 2008

Firstpage

44

Lastpage

47

Abstract

The origin of stress induced leakage current and defect generation process in the high-k/metal gate stacks under the substrate hot carrier stress and constant voltage stress is investigated. The data suggests that the defects responsible for the SILC increase are located near the high-k/SiO₂ interface. Generation of these defects is mostly caused by the cold carriers injected from the inversion layer rather than by the hot substrate carriers.

Keywords

MOSFET; hot carriers; leakage currents; semiconductor device reliability; silicon compounds; substrates; MOSFET; SiO₂; cold carriers; defect generation; high-k metal gate stacks; stress induced leakage current; substrate hot carrier stress; voltage stress; Dielectric substrates; Electron traps; Frequency; High K dielectric materials; High-K gate dielectrics; Hot carriers; Leakage current; MOSFETs; Stress; Substrate hot electron injection;

fLanguage

English

Publisher

ieee

Conference_Titel

Integrated Reliability Workshop Final Report, 2008. IRW 2008. IEEE International

Conference_Location

S. Lake Tahoe, CA

ISSN

1930-8841

Print_ISBN

978-1-4244-2194-7

Electronic_ISBN

1930-8841

Type

conf

DOI

10.1109/IRWS.2008.4796083

Filename

4796083