Title :
Strategic placement of reliable routers for the optimization of dependable dynamic NoC
Author :
Killian, C. ; Tanougast, C. ; Monteiro, F. ; Dandache, A.
Author_Institution :
Lab. Interfaces, Sensors & Microelectron., Univ. of Paul Verlaine, Metz, France
Abstract :
We present an optimization of reliable Network on Chip (NoC) suitable for dynamic reconfigurable systems based on FPGA. The originality of our approach resides on a strategic placement of routers incorporating elements of dependability in order to detect and correct the errors of the data packets. The solution is a factorization of these reliable routers encompassing routers without any error detection block. This ensures the global reliability of the network, and reduces the area overhead and the latency of the data packets. We present a theoretical study and hardware implementations which validates our reliable approach.
Keywords :
field programmable gate arrays; integrated circuit reliability; network routing; network-on-chip; optimisation; FPGA; area overhead; data packets; dynamic NoC; dynamic reconfigurable systems; error detection block; global reliability of; network-on-chip; reliable routers; strategic placement; Argon; Optimization; Registers; Reliability theory; Routing; Table lookup;
Conference_Titel :
Electronics, Circuits and Systems (ICECS), 2011 18th IEEE International Conference on
Conference_Location :
Beirut
Print_ISBN :
978-1-4577-1845-8
Electronic_ISBN :
978-1-4577-1844-1
DOI :
10.1109/ICECS.2011.6122372