DocumentCode
2922436
Title
An ultra-fast hybrid simulation framework for ASIP
Author
Qiu, Ji ; Gao, Xiang ; Jiang, Yifei ; Xiao, Xu
Author_Institution
Inst. of Comput. Technol., Key Lab. of Comput. Syst. & Archit., Grad. Univ. of Chinese Acad. of Sci., Beijing, China
fYear
2011
fDate
11-14 Dec. 2011
Firstpage
711
Lastpage
714
Abstract
ISS (Instruction Set Simulator) plays an important role in pre-silicon software development for ASIP. However, the speed of traditional simulation is too slow to effectively support full-scale software development. In this paper, we propose a hybrid simulation framework which further improves the previous simulation methods by aggressively utilizing the host machine resources. The utilization is achieved by categorizing instructions of ASIP application into two types, namely custom and basic instructions, via binary instrumentation. Then in a way of hybrid simulation, only custom instructions are simulated on the ISS and basic instructions are executed fast and natively on the host machine. We implement this framework for an industrial ASIP to validate our approach. Experimental results show that when the implemented ISS, namely GS-Sim, is applied to practical multimedia decoders, an average simulation speed up to 1058.5MIPS can be achieved, which is 34.7 times of the state-of-art dynamic binary translation simulator and is the fastest to the best of our knowledge.
Keywords
embedded systems; firmware; instruction sets; software engineering; ASIP; GS-Sim; ISS; binary instrumentation; instruction set simulator; presilicon software development; ultra-fast hybrid simulation framework; Context; Context modeling; Decoding; Instruments; Programming; Prototypes; Switches;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics, Circuits and Systems (ICECS), 2011 18th IEEE International Conference on
Conference_Location
Beirut
Print_ISBN
978-1-4577-1845-8
Electronic_ISBN
978-1-4577-1844-1
Type
conf
DOI
10.1109/ICECS.2011.6122373
Filename
6122373
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