A higher radix FFT FPGA implementation suitable for OFDM systems

This article describes a new approach for higher radix butterflies suitable for pipeline implementation. Based on the butterfly computation introduced by Cooley-Tukey [1], we will introduce a novel approach for the Discrete Fourier Transform (DFT) factorization, by redefining the butterfly computation, which is more suitable for efficient VLSI implementation. The proposed factorization motivated us to present a new concept of a radix-r Fast Fourier Transform (FFT), in which the radix-r butterfly computation concept was formulated as composite engines to implement each of the butterfly computations. This concept enables the radix r butterfly-processing element (BPE) to be designed by maintaining only one complex value multiplier in the butterfly critical path for any given r [2]. Algorithmic description and performance of low complexity FFT methods are considered in this paper where the speed and accuracy evaluation of the proposed method in fixed point is also elaborated.