• DocumentCode
    2922699
  • Title

    A GPGPU-based software implementation of the PBDI deinterlacing algorithm

  • Author

    Kowarzyk, G. ; Bélanger, N. ; Savaria, Y.

  • Author_Institution
    Ecole Polytech. de Montreal, Montréal, QC, Canada
  • fYear
    2011
  • fDate
    11-14 Dec. 2011
  • Firstpage
    780
  • Lastpage
    783
  • Abstract
    We present techniques for creating a software-only high-performance implementation of the Pattern-Based Directional Interpolation (PBDI) intra-field deinterlacing algorithm. The proposed techniques use General-Purpose computing on GPUs (GPGPU) for accelerating the computation of missing pixels in the interlaced fields, focusing on maximizing the available bandwidth and parallel computing resources offered by the GPU. This work demonstrates that ASIP like performance can be obtained with GPUs with a much lower development effort measured in weeks instead of months. The reported GPU implementation almost matches the performance of a fully optimized ASIP obtained after several months of research effort. Furthermore, this flexible software-only technique allows for easily updating the end-user systems as improvements in the algorithm are made.
  • Keywords
    graphics processing units; interpolation; ASIP; GPGPU-based software implementation; PBDI intra-field deinterlacing algorithm; general-purpose computing; parallel computing resources; pattern-based directional interpolation; Conferences; Graphics processing unit; Image edge detection; Instruction sets; Interpolation; Streaming media; deinterlacing; gpgpu; gpu; intra-field;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronics, Circuits and Systems (ICECS), 2011 18th IEEE International Conference on
  • Conference_Location
    Beirut
  • Print_ISBN
    978-1-4577-1845-8
  • Electronic_ISBN
    978-1-4577-1844-1
  • Type

    conf

  • DOI
    10.1109/ICECS.2011.6122390
  • Filename
    6122390