DocumentCode
2922929
Title
Understanding soft error propagation using Efficient vulnerability-driven fault injection
Author
Xu, Xin ; Li, Man-Lap
Author_Institution
Dept. of Electr. & Comput. Eng., George Washington Univ., Washington, DC, USA
fYear
2012
fDate
25-28 June 2012
Firstpage
1
Lastpage
12
Abstract
Extreme CMOS scaling is expected to significantly impact the reliability of future microprocessors, prompting recent research effort on low-cost hardware-software cross-layer reliability solutions. To evaluate, statistical fault injection (SFI) is often used to estimate the error coverage of the underlying method. Unfortunately, because a significant number of errors injected by SFI are often derated, the evaluation becomes less rigorous and less efficient. This paper makes the observation that many derated errors can be gracefully avoided to allow the fault injection campaign to focus on likely non-derated faults that stress the method-under-test. We propose a biased injection framework called CriticalFault that employs vulnerability analysis to map out relevant faults for stress testing. With CriticalFault, our results show that the injection space is reduced by 29% and 59% of the biased injections cause either software aborts or silent data corruptions, both are improvements from SFI. Moreover, we characterize different propagation behaviors of these non-derated faults and discuss the implications of designing future cross-layer solutions. Overall, not only CriticalFault is highly effective in identifying relevant test cases for current systems, but reliability researchers and engineers can also conduct more in-depth and meaningful analysis in deveoping future reliability solutions using CriticalFault.
Keywords
CMOS digital integrated circuits; fault simulation; integrated circuit reliability; microprocessor chips; radiation hardening (electronics); CriticalFault; SFI; biased injection framework; data corruptions; error coverage estimation; extreme CMOS scaling; injection space; low-cost hardware-software cross-layer reliability solutions; method-under-test; microprocessor reliability impact; nonderated faults; soft error propagation; statistical fault injection; stress testing; vulnerability analysis; vulnerability-driven fault injection; Computational modeling; Facsimile; Hardware; Reliability engineering; Switches; Fault Analysis; Fault Injection; Microarchitecture; Soft Error; Vulnerability;
fLanguage
English
Publisher
ieee
Conference_Titel
Dependable Systems and Networks (DSN), 2012 42nd Annual IEEE/IFIP International Conference on
Conference_Location
Boston, MA
ISSN
1530-0889
Print_ISBN
978-1-4673-1624-8
Electronic_ISBN
1530-0889
Type
conf
DOI
10.1109/DSN.2012.6263923
Filename
6263923
Link To Document