DocumentCode :
292348
Title :
Fixed-point bit-serial implementations of LDI Jaumann digital filters
Author :
Smith, Lome M. ; Nowrouzian, B.
Author_Institution :
Dept. of Electr. & Comput. Eng., Calgary Univ., Alta., Canada
Volume :
1
fYear :
1993
fDate :
19-21 May 1993
Firstpage :
112
Abstract :
The fixed-point bit-serial implementation of lossless discrete-integrator (LDI) Jaumann digital filters using Actel 1.2μ field programmable gate array (FPGA) technology is considered. The loss/frequency response specifications to be satisfied by the resulting implementations are similar to those required by commercial digital CODECs. A single multiplexed modified Booth multiplier is employed to ensure an area-efficient implementation while achieving the required sample rate. The resulting digital filter satisfies the given loss/frequency specifications with quantized multiplier coefficient values, and is free from internal signal overflow and limit cycle effects
Keywords :
codecs; digital arithmetic; digital filters; digital signal processing chips; field programmable gate arrays; frequency response; integrating circuits; multiplying circuits; 1.2 micron; LDI Jaumann digital filters; area-efficient implementation; digital CODECs; field programmable gate array; fixed-point bit-serial implementation; loss/frequency specifications; lossless discrete integrator; modified Booth multiplier; sample rate; Codecs; Digital filters; Digital signal processing; Field programmable gate arrays; Frequency; Passband; Quantization; Solids; Transfer functions; Upper bound;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Communications, Computers and Signal Processing, 1993., IEEE Pacific Rim Conference on
Conference_Location :
Victoria, BC
Print_ISBN :
0-7803-0971-5
Type :
conf
DOI :
10.1109/PACRIM.1993.407209
Filename :
407209
Link To Document :
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