DocumentCode :
2924506
Title :
Thermal optimization in multi-granularity multi-core floorplanning
Author :
Healy, Michael B. ; Lee, Hsien-Hsin S. ; Loh, Gabriel H. ; Lim, Sung Kyu
Author_Institution :
Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA
fYear :
2009
fDate :
19-22 Jan. 2009
Firstpage :
43
Lastpage :
48
Abstract :
Multi-core microarchitectures require a careful balance between many competing objectives to achieve the highest possible performance. Integrated early analysis is the consideration of all of these factors at an early stage. Toward this goal, this work presents the first adaptive multi-granularity multi-core microarchitecture-level floorplanner that simultaneously optimizes temperature and performance, and considers memory bus length. We include simultaneous optimization at both the module-level and the core/cache-bank level. Related experiments show that our methodology is effective for optimizing multi-core architectures.
Keywords :
circuit layout; computer architecture; microcomputers; multiprocessing systems; optimisation; cache-bank level; core-bank level; multi-core microarchitectures; multi-granularity multi-core floorplanning; thermal optimization; Educational institutions; High performance computing; Microarchitecture; Microprocessors; Optimization methods; Power dissipation; Temperature; Thermal engineering; Thermal management; Throughput;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 2009. ASP-DAC 2009. Asia and South Pacific
Conference_Location :
Yokohama
Print_ISBN :
978-1-4244-2748-2
Electronic_ISBN :
978-1-4244-2749-9
Type :
conf
DOI :
10.1109/ASPDAC.2009.4796439
Filename :
4796439
Link To Document :
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