An 11,424 gate-count dynamic optically reconfigurable gate array with a photodiode memory architecture

Author

Seto, Daisaku ; Watanabe, Minoru

Author_Institution

Dept. of Electr. & Electron. Eng., Shizuoka Univ., Hamamatsu

fYear

2009

fDate

19-22 Jan. 2009

Firstpage

117

Lastpage

118

Abstract

The world´s largest 11,424 gate-count dynamic optically reconfigurable gate array VLSI chip, which is based on the use of junction capacitance of photodiodes as configuration memory, has been fabricated. The size and process of the VLSI chip are, respectively, a 96.04 mm² and a 0.35 mum^-3 metal CMOS process technology. To clarify the availability of the VLSI, this paper shows an experimental result of a long retention time of its photodiode memory architecture.

Keywords

CMOS memory circuits; VLSI; logic gates; optical logic; photodiodes; reconfigurable architectures; VLSI chip; gate-count dynamic optically reconfigurable gate array; metal CMOS process technology; photodiode junction capacitance fabrication; photodiode memory architecture; very large scale integration; CMOS process; CMOS technology; Capacitance; Field programmable gate arrays; Holographic optical components; Holography; Memory architecture; Optical arrays; Photodiodes; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Design Automation Conference, 2009. ASP-DAC 2009. Asia and South Pacific

Conference_Location

Yokohama

Print_ISBN

978-1-4244-2748-2

Electronic_ISBN

978-1-4244-2749-9

Type

conf

DOI

10.1109/ASPDAC.2009.4796460

Filename

4796460