DocumentCode :
2924988
Title :
An 8.69 Mvertices/s 278 Mpixels/s tile-based 3D graphics SoC HW/SW development for consumer electronics
Author :
Chen, Liang-Bi ; Gu, Ruei-Ting ; Huang, Wei-Sheng ; Wang, Chien-Chou ; Shiue, Wen-Chi ; Ho, Tsung-Yu ; Chang, Yun-Nan ; Hsiao, Shen-Fu ; Lee, Chung-Nan ; Huang, Ing-Jer
Author_Institution :
Dept. of Comput. Sci. & Eng., Nat. Sun Yat-Sen Univ., Kaohsiung
fYear :
2009
fDate :
19-22 Jan. 2009
Firstpage :
131
Lastpage :
132
Abstract :
This paper presents an 8.69 Mvertices/s, 278 Mpixels/s, 15.7 mm2 tiled-based 3D graphics SoC HW/SW supporting OpenGL ES 1.0 running at 139 MHz. The SoC also includes embedded circuitry to monitor run time characteristics, detect bus protocol error/inefficiency, and capture bus traces at various abstraction levels with compression ratio up to 98%.
Keywords :
computer graphics; consumer electronics; hardware-software codesign; system-on-chip; OpenGL ES 1.0; consumer electronics; embedded circuitry; frequency 139 MHz; tile-based 3D graphics SoC HW-SW development; Bandwidth; Computer graphics; Consumer electronics; Costs; Debugging; Engines; Geometry; Hardware; Monitoring; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 2009. ASP-DAC 2009. Asia and South Pacific
Conference_Location :
Yokohama
Print_ISBN :
978-1-4244-2748-2
Electronic_ISBN :
978-1-4244-2749-9
Type :
conf
DOI :
10.1109/ASPDAC.2009.4796467
Filename :
4796467
Link To Document :
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