Title :
SAT-Controlled redundancy addition and removal — a novel circuit restructuring technique
Author :
Wu, Chi-An ; Lin, Ting-Hao ; Shao-Lun Huang ; Huang, Shao-Lun
Author_Institution :
Grad. Inst. of Electron. Eng., Nat. Taiwan Univ., Taipei
Abstract :
We proposed a novel Boolean Satisfiability (SAT)-controlled redundancy addition and removal (RAR) algorithm to resolve the performance and quality problems of the previous RAR approaches. With the introduction of modern SAT techniques, such as efficient Boolean constraint propagation (BCP), conflict-driven learning, and flexible decision procedure, our RAR engine can identify 10x more alternative wires/gates while achieving 70% reduction in runtime.
Keywords :
Boolean functions; logic gates; redundancy; Boolean constraint propagation; Boolean satisfiability-controlled redundancy addition; Boolean satisfiability-controlled redundancy removal; SAT-controlled redundancy; circuit restructuring technique; conflict-driven learning; flexible decision procedure; Business continuity; Circuit faults; Circuit synthesis; Circuit testing; Engines; Logic design; Redundancy; Runtime; Very large scale integration; Wire;
Conference_Titel :
Design Automation Conference, 2009. ASP-DAC 2009. Asia and South Pacific
Conference_Location :
Yokohama
Print_ISBN :
978-1-4244-2748-2
Electronic_ISBN :
978-1-4244-2749-9
DOI :
10.1109/ASPDAC.2009.4796479
