DocumentCode :
2925219
Title :
On improved scheme for digital circuit rewiring and application on further improving FPGA technology mapping
Author :
Chim, F.S. ; Lam, T.K. ; Wu, Y.L.
Author_Institution :
Dept. of Comput. Sci. & Eng., Chinese Univ. of Hong Kong, Hong Kong
fYear :
2009
fDate :
19-22 Jan. 2009
Firstpage :
197
Lastpage :
202
Abstract :
The digital circuit rewiring technique has been shown to be one of the most powerful logic transformation methods being able to further improve some already excellent results on many EDA problems. In this work a new hybrid rewiring approach that can enjoy advantages from both ATPG-based and graph-based rewiring is proposed. Our hybrid approach utilizes structural characteristics and ATPG technique to perform quick alternative wires identification inside circuits. Experimental results suggest that our hybrid engine is able to achieve about 50% of alternative wires coverage when compared with ATPG-based rewiring engine with 4% of runtime only. For some problems only requiring a good-enough and very quick solution, this new rewiring technique may serve as a useful alternative.
Keywords :
automatic test pattern generation; field programmable gate arrays; ATPG technique; EDA problems; FPGA technology mapping improvement; digital circuit rewiring technique; graph-based rewiring; logic transformation methods; Automatic test pattern generation; Delay; Digital circuits; Electronic design automation and methodology; Engines; Field programmable gate arrays; Logic circuits; Power engineering and energy; Runtime; Wire;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 2009. ASP-DAC 2009. Asia and South Pacific
Conference_Location :
Yokohama
Print_ISBN :
978-1-4244-2748-2
Electronic_ISBN :
978-1-4244-2749-9
Type :
conf
DOI :
10.1109/ASPDAC.2009.4796480
Filename :
4796480
Link To Document :
بازگشت