• DocumentCode
    2925457
  • Title

    Bound-based identification of timing-violating paths under variability

  • Author

    Xie, Lin ; Davoodi, Azadeh

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Univ. of Wisconsin at Madison, Madison, WI
  • fYear
    2009
  • fDate
    19-22 Jan. 2009
  • Firstpage
    278
  • Lastpage
    283
  • Abstract
    We introduce a bound-based technique to identify the top M timing-violating paths in a circuit under variability. These are the paths with the highest violation probability (i.e., Cp) which is the probability that a path (i.e., p) violates the timing constraint. To compute Cp, we require the violation probabilities of the nodes (i.e., Cn) and edges (i.e., Ce) on the path. First, we show computing Cn and Ce of all the nodes and edges requires only two rounds of Statistical Static Timing Analysis and then for each node/edge we need one table lookup for probability calculation using a technique known as Pearson Curve. Given Cn and Ce, our major contribution is in computing upper and lower bounds for Cp of an arbitrary path segment. We show constant-time for incremental update of the bounds when extending a path segment to a longer one. These bounds can be used to exactly construct the top violating paths. If the goal is to find the single most-violating path, we show a bound-based formulation that can prune a large portion of circuit without losing optimality. In our simulations, we verify the correctness and accuracy of our bounds for individual paths. We also verify identification of selected paths using Monte Carlo simulation. We obtain near-optimal accuracy with fast runtimes.
  • Keywords
    Monte Carlo methods; integrated circuit design; statistical analysis; timing; Monte Carlo simulation; bound-based identification; statistical static timing analysis; timing constraint; timing-violating paths; Circuit simulation; Delay; Fluctuations; Integrated circuit interconnections; Measurement; Probability; Process design; Runtime; Table lookup; Timing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 2009. ASP-DAC 2009. Asia and South Pacific
  • Conference_Location
    Yokohama
  • Print_ISBN
    978-1-4244-2748-2
  • Electronic_ISBN
    978-1-4244-2749-9
  • Type

    conf

  • DOI
    10.1109/ASPDAC.2009.4796493
  • Filename
    4796493