Analog placement with common centroid and 1-D symmetry constraints

In this paper, we will present a placement method for analog circuits. We consider both common centroid and 1D symmetry constraints, which are the two most common types of placement requirements in analog designs. The approach is based on a symmetric feasible condition on the sequence pair representation that can cover completely the set of all placements satisfying the common centroid and 1D symmetry constraints. This condition is essential for a good searching process to solve the problem effectively. symmetric placement is an important step to achieve matchings of other electrical properties like delay and temperature variation. We have compared our results with those presented in the most updated previous works. Significant improvements can be obtained by our approach in both common centroid and 1D symmetry placements, and we are the first who can handle both constraints simultaneously.