Automated design and optimization of circuits in emerging technologies

Author

Thakker, Rajesh A. ; Sathe, Chaitanya ; Sachid, Angada B. ; Baghini, Maryam Shojaei ; Rao, V. Ramgopal ; Patil, Mahesh B.

Author_Institution

Dept. of Electr. Eng., Indian Inst. of Technol. Bombay, Mumbai

fYear

2009

fDate

19-22 Jan. 2009

Firstpage

504

Lastpage

509

Abstract

A novel table-based environment for automatic design and optimization of FinFET circuits is demonstrated. A new accurate look-up table (LUT) technique is implemented in a circuit simulator and integrated with particle swarm optimization algorithm for efficient circuit designs in novel devices. Op-amp circuits are designed and optimized to demonstrate the accuracy and usefulness of the proposed platform. Further, it is shown that the proposed design methodology can take into account variations in process, supply voltage, and temperature.

Keywords

CMOS integrated circuits; MOSFET; circuit simulation; integrated circuit design; operational amplifiers; particle swarm optimisation; table lookup; FinFET circuits; circuit designs; circuit simulator; look-up table technique; op-amp circuits; particle swarm optimization algorithm; Circuit synthesis; Design methodology; Design optimization; FinFETs; Integrated circuit technology; Operational amplifiers; Particle swarm optimization; Table lookup; Temperature; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Design Automation Conference, 2009. ASP-DAC 2009. Asia and South Pacific

Conference_Location

Yokohama

Print_ISBN

978-1-4244-2748-2

Electronic_ISBN

978-1-4244-2749-9

Type

conf

DOI

10.1109/ASPDAC.2009.4796530

Filename

4796530