Title :
A SCORE macromodel for PLL designs to analyze supply noise interaction issues at behavioral level
Author :
Kuo, Chin-Cheng ; Lin, Pei-Syun ; Liu, Chien-Nan Jimmy
Author_Institution :
Dept. of Electr. Eng., Nat. Central Univ., Jhongli
Abstract :
Using behavioral models to perform fast simulation is currently a popular solution to verify SOC designs. Previous analog behavior modeling approaches often treat the noisy VDD waveform as a given input and focus on reflecting such stimuli on circuit performance. However, because the interaction of noise aggressors and victims is not considered, some errors may exist in the simulation. In this paper, a simple SCORE macromodel is proposed for PLL designs. It can be integrated with a supply-noise-aware PLL behavioral model to analyze supply noise effects at high level. In addition to numerical results, the time-varying supply noise waveform and real-time PLL responses can be obtained simultaneously. As demonstrated in the experimental results, the proposed approach can provide more realistic simulation results with noise interaction effects but still keep fast simulation time.
Keywords :
integrated circuit design; integrated circuit modelling; integrated circuit noise; phase locked loops; system-on-chip; SCORE macromodel; SOC designs; noise interaction effects; real-time PLL responses; supply-noise-aware PLL behavioral model; time-varying supply noise waveform; Circuit noise; Circuit optimization; Circuit simulation; Digital circuits; Noise level; Packaging; Performance analysis; Phase locked loops; Power supplies; Power system modeling;
Conference_Titel :
Design Automation Conference, 2009. ASP-DAC 2009. Asia and South Pacific
Conference_Location :
Yokohama
Print_ISBN :
978-1-4244-2748-2
Electronic_ISBN :
978-1-4244-2749-9
DOI :
10.1109/ASPDAC.2009.4796532