Title :
High-speed low-power FinFET based domino logic
Author :
Rasouli, Seid Hadi ; Koike, Hanpei ; Banerjee, Kaustav
Author_Institution :
Univ. of California, Santa Barbara, CA
Abstract :
This paper introduces a novel FinFET based domino logic, which exploits the exclusive property of the FinFET device (capacitive coupling between front-gate and back-gate in a four-terminal (4T) FinFET) to simultaneously achieve higher performance and lower power consumption. Using a new implementation of the resistive gate, the keeper device is made weaker at the beginning of the evaluation phase to reduce its contention with the pull-down network, but gradually becomes stronger to provide high noise margin. The strength of the keeper device is controlled by the differential gate voltage, which guarantees low gate-source voltage at the beginning of the evaluation phase and high gate-source voltage during rest of the time.
Keywords :
CMOS logic circuits; MOSFET; low-power electronics; CMOS technology; FinFET based domino logic; differential gate voltage; high-speed low-power device; pull-down network; CMOS logic circuits; CMOS technology; Energy consumption; FinFETs; Leakage current; Logic devices; Low voltage; MOSFETs; Subthreshold current; Tunneling;
Conference_Titel :
Design Automation Conference, 2009. ASP-DAC 2009. Asia and South Pacific
Conference_Location :
Yokohama
Print_ISBN :
978-1-4244-2748-2
Electronic_ISBN :
978-1-4244-2749-9
DOI :
10.1109/ASPDAC.2009.4796583