DocumentCode
2927315
Title
Reconfigurable double gate carbon nanotube field effect transistor based nanoelectronic architecture
Author
Liu, Bao
Author_Institution
Electr. & Comput. Eng. Dept., Univ. of Texas at San Antonio, San Antonio, TX
fYear
2009
fDate
19-22 Jan. 2009
Firstpage
853
Lastpage
858
Abstract
Carbon nanotubes (CNTs) and carbon nanotube field effect transistors (CNFETs) have demonstrated extraordinary properties and are widely accepted as the building blocks of next generation VLSI circuits. However, no nanoelectronic architecture has been proposed which is solely based on carbon nanotubes and carbon nanotube field effect transistors. The reasons include lack of a self-assembly technology which could form complex carbon nanotube structures, or, absence of a reconfigurable carbon nanotube device which could provide functionality, reliability, and performance via reconfigurability. In this paper, I propose a novel double gate carbon nanotube field effect transistor (RDG-CNFET), which is reconfigurable to be open, short, FET, or via. Layers of orthogonal carbon nanotubes with electrically bistable molecules sandwiched at each crossing form a dense array of RDG-CNFETs and programmable interconnects, and constitute a nanoelectronic architecture of manufacturability (via regularity), reliability (via reconfigurability), and performance (via device density). Simulation based on CNFET and molecular device compact models demonstrates superior logic density, reliability, performance and power consumption of the proposed RDGCNFET based nanoelectronic circuits compared with the existing, e.g., molecular diode/MOSFET based nanoelectronic circuits.
Keywords
VLSI; carbon nanotubes; field effect transistors; nanoelectronics; self-assembly; RDG-CNFET; nanoelectronic architecture; next generation VLSI circuits; orthogonal carbon nanotubes; programmable interconnects; reconfigurable carbon nanotube device; reconfigurable double gate carbon nanotube field effect transistor; self-assembly technology; CNTFETs; Carbon nanotubes; Circuit simulation; Double-gate FETs; Integrated circuit interconnections; Manufacturing; Nanoscale devices; Programmable logic arrays; Self-assembly; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2009. ASP-DAC 2009. Asia and South Pacific
Conference_Location
Yokohama
Print_ISBN
978-1-4244-2748-2
Electronic_ISBN
978-1-4244-2749-9
Type
conf
DOI
10.1109/ASPDAC.2009.4796587
Filename
4796587
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